Search results for "cortex-a32"

1 User Floating License Xtensa Front-End IN PRODUCT CATALOG
LA-8904L

Floating license, for connecting the TRACE32 front end for Xtensa to various 3rd party interfaces, for debugging simulators, emulators and virtual targets, as well as physical targets via USB. Supports the following interfaces: * Multi-Core Debug API (MCD) * GDB over Remote Serial Protocol (RSP) * Generic Transactor Library (GTL) (requires license LA-8983L) * Tessent Embedded Analytics via USB (requires license LA-8977L) * Intel® DCI.DbC (requires license LA-8968L). Supports the Cadence Tensilica Xtensa core architecture. For trace decoding please add license LA-9002L. For AMP multicore setups please add license LA-8902L. Floating license via RLM (Reprise License Manager). Please add the RLM HostID of the license server to your order.

Intel Debug & Trace Solutions IN SUPPORTED PLATFORMS

Analyze Intel® SoC designs with both the x86 and other Instruction Sets, from a single core Intel® Quark™ to multicore Core™ or Xeon™ application processors.

"Using our TRACE32® tools you can debug and control any x86 core (along with all of the other cores like..." "Arm® Cortex™, Arc™, Xtensa™ and even 8051) in any SoC via a single debug interface, all at the same..." "Besides x86 we support Arm® Cortex, Arc®, Xtensa®, 8051 and other cores in symmetric (SMP including hy-perthreading..." "be a powerful tool but tracing is even better...." "View all RELATED PRODUCTS TRACE32 Related Products for Intel 22 products(s) found Name A-Z Name Z-A 1..."

NEXUS Debug/Trace for Qorivva MPC5xxx/SPC5xxx IN PRODUCT CATALOG
LA-7630

Parallel NEXUS Adapter with AutoFocus technology for Qorivva MPC5xxx/SPC5xxx and PX series includes debugger for eTPU and GTM Concurrent debugging of multiple e200 cores on multicore processors requires a License for Multicore Debugging (LA-7960X) (not necessary for lockstep mode) Voltage range: 1..5 V TRACE port: 2..16 MDO (data) lines 1..2 MSEO (control) lines Data Bandwidth: up to 200 MBit/s 76-pin mictor connector requires one of the following converters LA-7631 for Mictor 38 on target LA-7632 for Glenair 51 on target LA-7636 for SAMTEC 50 on target LA-7637 for SAMTEC 20 on target includes software for Windows, Linux and MacOSX requires PowerTrace hardware usage with PowerTrace III requires TRACE32 software DVD 2021/09 or newer please contact Lauterbach if the serial number of your PowerTrace is lower than E03010003982

PowerTrace supports you in bringing your embedded designs to market faster and more reliably than ever, while creating a safer and more stable product.

"For low-speed CPUs or Arm Cortex-M cores we provide two compact and cost-effective debug and trace alternatives..." "It is primarily used in Arm processors, but also with Hexagon, Ceva-X and Teak cores...." "designed for Arm's CoreSight debug and trace infrastructure it allows today the simulations tracing of Arm Cortex..." "It is also used to gather real-time trace information of RISC-V cores...." "Infineon Multi-Core Debug Solution The Multi-Core Debug Solution (MCDS) is an on-chip trigger and trace..."

CombiProbe 2 for AUTO26 (PACK) IN PRODUCT CATALOG
LA-3081

CombiProbe 2 with AUTO26 Whisker for debugging and DAP Streaming, supporting DAP (DAP2, DAP3, DAP4, DAPWide), JTAG, DXCPL/DXCM. For optimal performance, we recommend using a DAP mode. DAP streaming is supported for TriCore (in DAP mode) and works most effectively with DAPWide (up to 320 Mbit/s). For DXCPL/DXCM, you will likely require the CAN-Box (LA-3889) as well. Voltage Range: 1.8V to 5.0V. Debug Clock Frequency: 10 kHz to 160 MHz Target Connector: AUTO26, AUTO20, AUTO10 Trace Memory: 512 MByte. Includes the TRACE32 software for Windows, Linux and macOS on DVD and for download. Requires the following A-license: LA-7756A (Debugger for TriCore Standard Additional). Trace analysis and display requires LA-3799X (Trace License for TriCore ED). Requires Power Debug Interface USB 3.0,PowerDebug II, PowerDebug PRO, PowerDebug E40 or PowerDebug X50. Please note that TriCore SoCs usually support only 3.3V or 5V in DAP mode. Debug clock frequency in JTAG mode is typically limited to 40 MHz on TriCore SoCs (while up to 160 MHz is supported in DAP mode). Extend your CombiProbe with a Mixed-Signal Probe (LA-2500), to record digital and analog signals and correlate them with MCDS DAP streaming. (Requires PowerView R.2024.02 or higher). Alternatively extend your CombiProbe with a second AUTO26 Whisker (LA-4553) and a multicore license (LA-7960X) to debug and trace two TriCore chips simultaneously. (Req. PowerView R.2024.09 or higher).

We support silicon IP solutions that enable full debug and trace functionality without limitations by using a USB connection between target and host computer.

"via a on-chip communication infrastructure...." "The TRACE32® software implements two parts, a front end and a back end...." "debugging of identical cores and cores of different architectures OS-aware debugging including Linux..." "Xtensa Arm Cortex Intel Direct Connect Interface (DCI) DbC Intel DCI DbC allows to debug Intel x86-Platforms..." "debugging of identical cores and cores of different architectures OS-aware debugging including Linux..."

Our Instruction Set Simulator is the perfect complement to our debug tools. It provides the same look and feel as a real debugger connected to a real target.

"It is a built-in feature of our TRACE32 PowerView software and is freely available to all owners of a..." "Integrated in TRACE32 PowerView, it provides the same look and feel as a real debugger connected to a..." "TRACE32 Simulator API to write a Peripheral Simulation Model (PSM)...." "Tool qualification is typically required in the context of safety-related projects where it is beneficial..." "Simulators for the Following Architectures Architecture ISS ISS TQSK Test Suite 68HC12 78K ARC Arm® / Cortex..."

Ensure Perfect Recordings for High-Speed Parallel Trace Ports.

"scripts for optimal hardware configuration including a trace port test...." "Get more Trace Information Out of Your Cores If the trace infrastructure on your target allows higher..." "is chosen that guarantees a stable clock signal; for the data channels, a threshold voltage is chosen..." "AUTOFOCUS technology in real life Set Up Optimal Sampling Points for Arm Cortex-M Parallel Trace The..." "image shows the automatic adjustment of sampling points on an Arm Cortex-M7 based microcontroller...."

Our PowerTrace II Lite trace module for mid- and low-speed cores lets you record system behavior in real-time without influencing the system operation.

"Extension Our cost-effective PowerTrace II Lite trace module is well suited for mid- and low-speed cores..." "Use Any Available Trace Protocol Store data from multiple cores simultaneously in 1 GB of high-speed..." "Keep Up With Modern Multicore Devices Store data from multiple cores simultaneously in 1 GB of high-speed..." "Requires a suitable trace preprocessor or Nexus Adapter...." "Examples for PowerTrace II Lite Arm® Parallel Trace To investigate the dynamic code execution on your Arm Cortex..."

Tool Qualification IN FEATURES & USE CASES

Our Tool Qualification Support Kit minimizes your Debug- and Trace-Tool Qualification Efforts and Costs in Safety-related embedded Projects

"we can offer you a solution based on our TQSK for that as well...." "This standard uses Automotive Safety Integrity Levels (ASILs A–D) to measure risk...." "Test Suite - Coverage Prequalified with the following chips / architectures: TI Hercules RM57Lx -Arm Cortex-R5NXP..." "MPC5777M - PowerPC MPC55xxInfineon Aurix TC297TF - TriCore TC27xST Microelectronics Stellar SR6P7G7 - Arm Cortex-R52NXP..." "After registering, you can download a personalized version of the TRACE32 TQSK...."