Search results for "cortex-a9"

The AUTO26 Debug Probe supports a wide range of processor architectures and automotive requirements which make it unique in the embedded industry.

"A TAP is the access point to the debug infrastructure within a chip...." "TAPs can be chained to allow the debug-ging of several cores via a single debug probe. cJTAG (IEEE 1149.7..." "It can permanently disable the watchdog as well as control the watchdog based on the core state...." "Concurrent debugging of multiple e200 cores on multicore processors requires a License for Multicore..." "dsPIC requires LA-2762 Package for CombiProbe 2 dsPIC Dual Core Includes software for Windows, Linux..."

MIPS - Lauterbach TRACE32 Debugger and Trace Solutions

"On a multicore-SoC, even with multiple architectures, you can debug cores concurrently, empowering you..." "to investigate multi-core interactions of your embedded application...." "world-class features, together with the powerful script language, which allows even the simultaneous control cores..." "View all Flash Devices We support the programming of a large variety of flash devices...." "View all RELATED PRODUCTS TRACE32 Related Products for MIPS 21 products(s) found Name A-Z Name Z-A 1..."

Smarter Products are a part of all our lives and we at Lauterbach support you in bringing your ideas to life – faster, reliable and successful.

"perfect fit for us because of the large number of core architectures that the Lauterbach debugger supports..." "supported architectures With the addition of support for Qualcomm`s Hexagon, TRACE32 reaches the 50th core..." "RISC cores, DSPs and softcores (such as NIOS II) were all supported at this time...." "In 2007 ARC was added, as the first configurable core. 2008 High-speed serial trace As processor architectures..." "certified by TÜV NORD. today The success story continues - Reliable, high-performance tools - Nearly 100 core..."

Start the application development early in the SoC platform design flow without having to switch to other debug tools during the transition from virtual prototypes to real hardware

"Design Platform for Reuse and Integration of IPs (SPRINT) Project has taken the challenge to develop a..." "SoCs and comes with a set of sub-APIs offering the following features: Target Connection Connection/..." "; multiple cores of a system can be connected to a tool simultaneously...." "Target Run ControlRun control designed for multi-core systems; the reaction of a system's processing..." "units to these calls can be configured core by core...."